1. Field of the Invention
The invention relates to a frequency detector for carrier frequency synchronization in receivers for digital data transmission. Such frequency detectors have been disclosed, for example by the German Patent Specification 37 07 762.
2. Description of Prior Art
A frequency detector is known for carrier frequency synchronization in a receiver of a digital data transmission, which produces a demodulated received signal including an in-phase component and a quadrature component and includes a frequency control circuit including a voltage-controlled oscillator producing a VCO signal, means for producing a product signal from the received signal and the VCO signal, the product signal consisting of a real part (x) and an imaginary part (y), means for suppressing signal terms of a double frequency of the product signal. This frequency detector comprises means for inputting the real part (x) and the imaginary part (y) of the product signal; cascades of complex bandpass filters and real or complex pre-equalizers, these cascades including means for bandpass filtering and means for pre-equalizing the real part (x) and the imaginary part (y) of the product signal to form cascade output signals and a logic circuit including means for combining the cascade output signals to form a control signal for the voltage-controlled oscillator.
The correction of the carrier frequency in the receiver is necessary in many cases in the transmission of data signals, for example when differential demodulation is performed. However, even in the case of a coherent receiver in which the correction of the carrier frequency is performed during operation by means of a phase locked loop (PLL), further correction of the carrier frequency is required in order to accelerate the initial synchronization of the phase locked loop, or to enable it at all. Use is generally made in these cases of an automatic frequency control (AFC). An essential component of this automatic frequency control is the frequency error detector or, for short, frequency detector, which supplies a measure of the frequency error instantaneously present. The above-mentioned patent describes such a frequency detector. Importance attaches in this case to the so-called pattern jitter freedom, which means that the output sisal of the frequency detector is independent of the transmitted data pattern in the case of a steady-state control loop.
The conditions for the pattern jitter freedom of such a frequency error detector are described in the essay by Alberty and Hespelt "A New Pattern Jitter Free Frequency Error Detector", IEEE COM-37, No. 2, February 1989, pages 159 to 163.
The frequency detector which is described by the above-mentioned patent does permit synchronization even in the case of a very large frequency offset, is economically produced and also achieves the result that the pattern jitter is completely suppressed for any type of multiphase PSK modulation or multiphase quadrature amplitude modulation (M-QAM). However, it does not produce any pattern jitter freedom in the case of offset modulations.